Laboratory Manual ELEN 474 VLSI Circuit Design

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Table of Contents,Lab 0 Introduction 1,Lab 1 Introduction to Cadence 3. Lab 2 Layout Design 18,Lab 3 More Layout Techniques 28. Lab 4 MOS Device Characterization 31,Lab 5 Current Mirrors 37. Lab 6 Inverting Amplifiers 43,Lab 7 Differential Pairs 54. Lab 8 Operational Transconductance Amplifiers 64,Lab 9 2 Stage Miller OTA 70.
Lab 0 Introduction, This laboratory complements the course ELEN 474 VLSI Circuit Design The lab. manual details basic CMOS analog integrated Circuit design simulation and testing. techniques Several tools from the Cadence Development System have been integrated. into the lab to teach students the idea of computer aided design CAD and to make the. analog VLSI experience more practical, To fully appreciate the material in this lab course the student should have a. minimal background with the following computer systems equipment and circuit. analysis techniques Students should be familiar with the UNIX operating system. Previous experience using a SPICE like circuit simulator is also important This course. does not explain the various SPICE analyses and assumes the student is capable of. configuring the appropriate SPICE analysis to obtain the desired information from the. circuit Finally the student should have general familiarity with active circuit hand. analysis All of these prerequisites are satisfied by having credit for ELEN 325 and. The lab manual develops the concepts of analog integrated circuit design in a. bottom up approach First the basic devices of CMOS circuit design the NMOS and. PMOS transistors are introduced and characterized Then one or more transistors are. combined into a subcircuit such as a differential pair current mirror or simple inverter. and these small circuits are analyzed Finally these subcircuits are connected to form. larger circuits such as operational transconductance amplifiers and operational amplifiers. and the idea of design methodologies is developed Continuing with the bottom up. approach these circuits can be combined to form systems such as filters or data. converters not currently covered in this course The following figure illustrates the. bottom up approach used in the laboratory,OTA Op Amp. Current Differential,Mirror Pair,N MOST P MOST,Figure 0 1 Bottom Up Approach. The lab activities will generally be one week labs However there will be some. longer labs toward the end that will be two week labs Before the lab the student should. read through the lab description and perform the pre lab exercises Generally the pre lab. exercises are the hand design for the circuit being studied During the lab students will. perform circuit simulations to verify their hand calculations Tweaking circuit. parameters will usually need to be done since hand calculations will not always be 100. accurate Also the integrated circuit layout will be created This will often require more. time to do than 3 hour lab time that is allocated and will need to be finished outside of lab. sometime before the next lab meeting,Lab Report, Each team will submit one lab report for each lab Reports are due at the.
beginning of class Lab reports will consist of not more than three typed pages of single. spaced text Be concise,TITLE PAGE,DESCRIPTION, Include three or four sentences which describe the significant aspects of the lab. This section specifies problems or theory that will be investigated or solved The. description is a more detailed version of the objective. Include circuit diagrams and design formulas calculations All circuit diagrams. must be descriptively titled and labeled A design formula calculation must be. given for each component Do not derive equations, This section usually consists of tables and SPICE plots. DISCUSSION, This is the most important part of the lab report Simply justify the difference. between the theoretical and simulated values and answer and needed questions. CONCLUSION, Two or three sentence summary of what the lab demonstrated The conclusion. usually responds to the problems specified in the DESCRIPTION section. Lab 1 Introduction to Cadence,Objectives, Learn how to login on a UNIX station perform basic UNIX tasks and use the.
Cadence design system to simulate and layout simple circuits. Introduction, This lab will introduce students to the computer system and software used. throughout the lab course First students will learn how to login and logout of a Sun. SparcStation Next basic operating system commands used to perform file management. printing and various other tasks will be illustrated Finally students will be given an. overview of the Cadence Development System, In class examples will demonstrate the creation of libraries the construction of. schematic symbols the drafting of schematics and the layout of simple transistors The. student will apply this knowledge to the creation of a CMOS inverter. Logging In Logging Out, In order to use the UNIX machines you must first login to the system As with. the PC lab enter the logon id and password at the prompts Login using the logon ID and. password obtained from the electrical engineering office This is your account and all. files stored in this area will be retained by the system after logging out Do not insert a. floppy disk in the SparcStation There is no need to attempt to make floppy disk back. ups of your data files,Using the UNIX Operating System. Using the UNIX operating system is similar to using other operating systems such. as DOS UNIX commands are issued to the system by typing them in a shell or. xterm UNIX commands are case sensitive so be careful when issuing a command. usually they are given in lower case, The following list summarizes all the basic commands required to manage the.
data files you will be creating in this lab course All UNIX commands are entered from. the shell or xterm window Do not use UNIX commands for modifying deleting or. moving any Cadence data files,Table 1 1 Common UNIX Commands. ls la Lists files in the current directory l lists with properties and. a also lists hidden files ones beginning with a,cd XXXX Changes the current directory to XXXX. cd Changes the current directory back one level,cp XXXX YYYY Copies the file XXXX to YYYY. mv XXXX YYYY Move file XXXX to YYYY Also used for rename. rm XXXX Deletes the file XXXX,mkdir XXXX Creates the directory XXXX. lp dXXXX YYYY Prints the textfile or postscript file YYYY to the printer named. XXXX where XXXX can be either ipszac or hpszac, gedit XXXX Starts the gedit text editor program and loads file XXXX.
icfb Starts the Cadence software,top Check available processes and memory usage. quota v Check for disk space available, who grep my name Display the terminal where I am connected. Note The command tells UNIX to execute the command and return the prompt to. the active shell, The Cadence Development System consists of a bundle of software packages. such as schematic editors simulators and layout editors This software manages the. development process for analog digital and mixed mode circuits In this course we will. strictly use the tools associated with analog circuit design. All the Cadence design tools are managed by a software package called the. Design Framework II This program supervises a common database which holds all. circuit information including schematics layouts and simulation data. From the Design Framework II also known as the framework we can invoke a. program called the Library Manager which governs the storage of circuit data We can. access libraries and the components of the libraries called cells. Also from the framework we can invoke the schematic entry editor called. Composer Composer is used to draw circuit diagrams and draw circuit symbols. A program called Virtuoso is used for creating integrated circuit layouts The. layout is used to create the masks which are used in the integrated circuit fabrication. Finally circuit simulation is handled through an interface called Analog Artist. This interface can be used to invoke various simulators including HSPICE Spectre and. Verilog We will be using the SpectreS simulator in this course. Starting Cadence for the First Time, All Cadence simulations need to be run on the Sunfire server To connect to this server. you should type the following commands into a terminal. ssh X sunfire ece tamu edu, DO NOT CLOSE THE TERMINAL It must remain open the whole time you have.
Cadence running, Before Cadence can be run some basic configuration of your system needs to be done. We need to first edit our cshrc file so that the correct version of cadence is run You can. do this with any text editor that you wish If you are new to UNIX I recommend a. program called gedit since it is very similar to Notepad in Windows From a terminal. gedit cshrc, In the text editor that opens you need to add the following two lines to the end of the file. source usr local bin setup ic5141,setenv CDK DIR baby cadence ic50 local. Save the changes you made to cshrc and close the file At the terminal type. source cshrc,Next edit your cdsenv file,gedit cdsenv. Add the line,asimenv startup cds ade wftool string awd.
Next we need to make a new directory called cadence which will hold all of our. cadence files This will also be the directory you need to run Cadence from in the future. In this folder we will also put two more configuration files cds lib and cdsinit. mkdir cadence,cd cadence,cp baby courses 474 cds lib cadence. cp baby courses 474 cdsinit cadence, Cadence should be ready to run now From now on you can launch Cadence when you. login to Sunfire by typing,cd cadence, This will load Cadence The Command Interpreter Window CIW will now load as. shown in Figure 1 1,Figure 1 1 The Cadence CIW,Starting a Design. From the CIW select Tools Library Manager to load the Library Manager. Figure 1 2 The Library Manager stores all designs in a hierarchal manner A library is. a collection of cells For example if you had a digital circuits library named Digital it. will have several cells included in it These cells will be inverters nand gates nor gates. multiplexers etc Each cell has different views These views will in general be things. such as symbols schematics or layouts of each cell. Figure 1 2 Library Manager, The first thing you need to do to start a design is create a library to store the cells.
you will be designing in this lab Let s call this library ee474 From the Library. Manager select File New Library Name the library ee474 without quotes and. select OK In the window that appears select Attach to an existing techfile Figure 1 3. and select OK In the next window Figure 1 4 make sure that NCSU TechLib ami06. is selected and select OK,Figure 1 3 Attach to an existing techfile. Figure 1 4 Attaching to a library to a technology file. Creating a Schematic, The first circuit we will design is a simple inverter Select which library you want. to put the cell into in this case ee474 and then File New Cell Name your cell. inverter The tool you want to use here is Composer Schematic as seen in Figure 1 5. Figure 1 5 Creating a new cell view, After selecting OK the schematic window opens We wish to add two transistors. so that we can make an inverter To do this we need to add an instance You can do this. by either clicking Add Instance or by pressing i on the keyboard A window titled. Component Browser should pop up Make sure that the library NCSU Analog Parts is. selected Select N Transistors and then nmos4 Go back to the schematic and select. where you would like to add the NMOS transistor Go back to the Component Browser. and select P transistors and then pmos4 Add this transistor to your schematic Hit ESC. to exit the Add Instance mode, Connect components together using wires You can select Add Wire or use. the w hotkey, Pins identify the inputs and outputs of the schematic Click Add Pin or use the.
p hotkey Pin names and directions must be consistent between the symbol schematic. and layout The name uniquely identifies the pin while the direction indicates the usage. of the pin I recommend using the inputOutput direction for all pins. To change the properties of a device use Edit Properties Objects or use the. q hotkey Try changing the width of the PMOS transistor from 1 5u to 3u When. finished your schematic should resemble Figure 1 6. Figure 1 6 Inverter, Select Design Check and Save to save your schematic and make sure that there. are no errors or warnings,Creating a Symbol, Without closing the schematic window select Design Create Cellview From. Cellview Make sure that schematic is selected in the From View Name field Tool. Data Type needs to be symbol Select OK and then OK again on the next window. Figure 1 7 Create cellview from cellview, The symbol created should resemble the one in Figure 1 8 This does not. resemble an inverter symbol at all We can redraw it by deleting some lines and adding. new ones The final symbol should resemble Figure 1 9. Figure 1 8 Default Symbol,Figure 1 9 Final Inverter Symbol. Creating a Layout, After the schematic and symbol have been designed it is time to move onto the.
layout of the circuit From the library manager select File New Cell View Layout. is done using the tool named Virtuoso Select Virtuoso as the toolname Figure 1 10. After clicking OK Virtuoso should open as well as the layer selection window LSW. This laboratory complements the course ELEN 474 VLSI Circuit Design The lab manual details basic CMOS analog integrated Circuit design simulation and testing techniques Several tools from the Cadence Development System have been integrated into the lab to teach students the idea of computer aided design CAD and to make the analog VLSI experience more practical To fully appreciate the

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